Case studies

Anonymized engagements, concrete outcomes

Every case study follows the same structure: the challenge, our role and the result. Client names and product details are withheld. Numbers are published only with client approval and are backed by data we can show under NDA.

Challenge

The specification, the node, the schedule and what made it hard.

Our role

Which engagement model, which engineers, which deliverables and how the work was reviewed.

Result

What was measured on silicon or signed off at tape-out, and what the client did next.

All case studies

High-speed SerDes IP porting and migration

[CASE STUDY: anonymized, to be supplied] SerDes port to a new node

Challenge: [CHALLENGE: to be supplied. Suggested content: a proven transceiver on the old node had to ship on the new node; supply dropped from [VOLTAGE] to [VOLTAGE]; the metal stack changed; the original designers were on another program; the tape-out date was fixed by a customer commitment.]
Result: [RESULT: to be supplied. Suggested content: tape-out on the committed date; post-layout eye margin at the worst corner; silicon correlation results after bring-up; what the client did next.]

Data rate [NUMBER: to be supplied] Gb/s
Channel loss [NUMBER: to be supplied] dB
Energy [NUMBER: to be supplied] pJ/bit
Schedule [NUMBER: to be supplied] weeks

Node: [NODE: to be supplied] → [NODE: to be supplied]

DDR / LPDDR PHY Dedicated design team

[CASE STUDY: anonymized, to be supplied] Dedicated team on an LPDDR PHY

Challenge: [CHALLENGE: to be supplied. Suggested content: the client's PHY team lost headcount mid-program; training logic and the I/O cells were behind schedule; the SoC tape-out could not move.]
Result: [RESULT: to be supplied. Suggested content: PHY delivered to the SoC integration milestone; training convergence on first boards; margin measured on silicon; team extended to the next program.]

Data rate [NUMBER: to be supplied] Mb/s per pin
Team [NUMBER: to be supplied] engineers
Duration [NUMBER: to be supplied] months
Tape-outs [NUMBER: to be supplied]

Node: [NODE: to be supplied]

PLL and ADPLL Fixed-scope block delivery

[CASE STUDY: anonymized, to be supplied] Fixed-scope ADPLL for a SerDes reference

Challenge: [CHALLENGE: to be supplied. Suggested content: a start-up without an in-house clocking designer needed a low-jitter reference for its SerDes; the block had to port to a second node within a year; area was constrained by the die plan.]
Result: [RESULT: to be supplied. Suggested content: milestone acceptance on schedule; post-layout jitter and spur results at the worst corner; silicon measurements; port to the second node.]

Integrated jitter [NUMBER: to be supplied] fs RMS
Output [NUMBER: to be supplied] GHz
Power [NUMBER: to be supplied] mW
Area [NUMBER: to be supplied] mm²

Node: [NODE: to be supplied]

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